I've been meaning to look closer at the Oasis3 (2019 model) for a while but haven't done so yet. A serial port connection would be very helpful but as far as I know the connection points for this have not been identified yet.
Below are some resources e.g. data sheets and application notes that I have collected so far. These should be a good starting point for anyone who wants to pursue this further. There are some key and unconfirmed assumptions here, such as the Oasis 3 (2019) using the NXP (ARM) i.MX 7ULP processor. This is based on product reviews not a physical inspection on the device. When I find a good deal on a used OA3, or two, and have a device in hand, I'll confirm the processor model.
The i.Mx 7ULP is the ultra low power version of the NXP (ARM) A7 + M4 series processor, with an 800 Mhz base clock
Architecture Overview (png block diagram)
i.MX 7 Series Processors Product Selector
i.MX 7ULP datasheet (PDF)
Code signing tools (Downloads)
Application Note: On-The-Fly AES Decryption(OTFAD) in i.MX 7ULP (PDF)
i.MX 7ULP Applications Processor Reference Manual (registration required to access)
Hardware Development Guide for the i.MX 7ULP Applications Processor (registration required to access)
iMX7ULP uCOM Board Datasheet (PDF) (Preliminary version of the above document?)
White paper (PDF)
iMX Linux Reference manual (PDF)
Cortex M-series Technical Reference Manual (PDF)
CoreSight Components Reference Manual (PDF)
Working with Cortex-M4 on i.MX7 Dual (PDF)
Getting Started with Android on iMX based Com boards (PDF)
Development boards are available from NXP @ $199 USD. Boards include JTAG and Debug (UART via USB) ports. There are also a lot of code samples, source, sample kernels, binaries and application notes available, much of which require creating an account to access. On the development board, a 20-pin header, with the standard ARM JTAG pinout is used for the JTAG interface (see below).
Quick Start Guide: i.MX 7ULP Evaluation Kit (PDF)
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Arm Cortex processors can make use of Serial Wire Debug (SWD or ARM's acronym, SWJ-DP), which are JTAG variants using 2 or 3 signal pins (orange labels), instead of the traditional 4 pins. So serial access may be via 2, 3 or 4 pins on the OA3. And UART access is likely available through the USB port as well. Serial port and JTAG are often used interchangeably as their use overlaps but true serial is asynchronous, where JTAG (and confusingly, SWD) are synchronous.
SWD pins are overlaid on the JTAG architecture, a good explanation of the pinouts can be found here. Note in particular that pull up and down resistors are required to get valid logic states. Pins can float without external resistors.
NXP FreeMaster 2.0 For Embedded (Debug /JTAG /UART access) (Download) -no iMX7 support
NXP FreeMaster 2.0 Manual (PDF) -no iMX7 support
ARM Whitepaper describing the use of SWD
ARM Whitepaper /Introduction to CoreSight (Debug and Trace) (PDF)
When trying to confirm where JTAG pins are on a device board, it's helpful to use some simple code to look for patterns which identify JTAG pins. Google for "jtag finder", one example here
Android version 9.0.0 is used in the code base according to NXP application notes.
Below are some resources e.g. data sheets and application notes that I have collected so far. These should be a good starting point for anyone who wants to pursue this further. There are some key and unconfirmed assumptions here, such as the Oasis 3 (2019) using the NXP (ARM) i.MX 7ULP processor. This is based on product reviews not a physical inspection on the device. When I find a good deal on a used OA3, or two, and have a device in hand, I'll confirm the processor model.
The i.Mx 7ULP is the ultra low power version of the NXP (ARM) A7 + M4 series processor, with an 800 Mhz base clock
Architecture Overview (png block diagram)
i.MX 7 Series Processors Product Selector
i.MX 7ULP datasheet (PDF)
Code signing tools (Downloads)
Application Note: On-The-Fly AES Decryption(OTFAD) in i.MX 7ULP (PDF)
i.MX 7ULP Applications Processor Reference Manual (registration required to access)
Hardware Development Guide for the i.MX 7ULP Applications Processor (registration required to access)
iMX7ULP uCOM Board Datasheet (PDF) (Preliminary version of the above document?)
White paper (PDF)
iMX Linux Reference manual (PDF)
Cortex M-series Technical Reference Manual (PDF)
CoreSight Components Reference Manual (PDF)
Working with Cortex-M4 on i.MX7 Dual (PDF)
Getting Started with Android on iMX based Com boards (PDF)
Development boards are available from NXP @ $199 USD. Boards include JTAG and Debug (UART via USB) ports. There are also a lot of code samples, source, sample kernels, binaries and application notes available, much of which require creating an account to access. On the development board, a 20-pin header, with the standard ARM JTAG pinout is used for the JTAG interface (see below).
Quick Start Guide: i.MX 7ULP Evaluation Kit (PDF)
Arm Cortex processors can make use of Serial Wire Debug (SWD or ARM's acronym, SWJ-DP), which are JTAG variants using 2 or 3 signal pins (orange labels), instead of the traditional 4 pins. So serial access may be via 2, 3 or 4 pins on the OA3. And UART access is likely available through the USB port as well. Serial port and JTAG are often used interchangeably as their use overlaps but true serial is asynchronous, where JTAG (and confusingly, SWD) are synchronous.
SWD pins are overlaid on the JTAG architecture, a good explanation of the pinouts can be found here. Note in particular that pull up and down resistors are required to get valid logic states. Pins can float without external resistors.
NXP FreeMaster 2.0 For Embedded (Debug /JTAG /UART access) (Download) -no iMX7 support
NXP FreeMaster 2.0 Manual (PDF) -no iMX7 support
ARM Whitepaper describing the use of SWD
ARM Whitepaper /Introduction to CoreSight (Debug and Trace) (PDF)
When trying to confirm where JTAG pins are on a device board, it's helpful to use some simple code to look for patterns which identify JTAG pins. Google for "jtag finder", one example here
Android version 9.0.0 is used in the code base according to NXP application notes.